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3
Peripheral
application board
header, P16
ABOUT THE DEVELOPMENT BOARD
Application-specific expansion headers — P16 and P17
Pin
Signal
Description /
Pin
Signal
Description / Comment
Comment
1
3
5
7
9
11
13
15
17
19
21
GND
DATA_1
DATA_3
DATA_4
DATA_6
GND
Reserved (DATA_9)
Reserved (DATA_11)
Reserved (DATA_12)
Reserved (DATA_14)
GND
Ground
Data bus
Data bus
Data bus
Data bus
Ground
n/a
n/a
n/a
n/a
Ground
2
4
6
8
10
12
14
16
18
20
22
DATA_0
DATA_2
GND
DATA_5
DATA_7
Reserved (DATA_8)
Reserved (DATA10)
GND
Reserved (DATA_13)
Reserved (DATA_15)
+3.3V
Data bus
Data bus
Ground
Data bus
Data bus
n/a
n/a
Ground
n/a
n/a
8 bit /16 bit#
3.3V selects 8-bit data bus
23
25
27
29
31
33
35
37
39
41
43
GND
+3.3V
ADDRESS_1
ADDRESS_3
ADDRESS_4
ADDRESS_6
GND
Reserved (ADDRESS_9)
CS#
WE#
I2C_SCL / GPIO70
Ground
Power
Address bus
Address bus
Address bus
Address bus
Ground
n/a
Static memory chip select 0
Write enable
I 2 C serial clock line
24
26
28
30
32
34
36
38
40
42
44
+3.3V
ADDRESS_0
ADDRESS_2
GND
ADDRESS_5
ADDRESS_7
Reserved (ADDRESS_8)
GND
I2C_SDA / GPIO71
OE#
PERI_INT#
Power
Address bus
Address bus
Ground
Address bus
Address bus
n/a
Ground
I 2 C serial data line
Output enable
USER_PUSH_BUTTON2 /
PERI_INT0# / GPIO69
45
47
+3.3V
PERI_GPIO0
Power
DIGITAL_IO_9 /
46
48
+3.3V
PERI_GPIO1
Power
DIGITAL_IO_10 /
UART3_RTS /
GPIO42_PRT
UART3_CTS# / GPIO43_PRT
49
RESET_OUT
Connected to inverted
50
GND
Ground
BUFFENR# signal
44
ConnectCore 9C/Wi -9C Hardware Reference, Rev D 05/2010
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